| /linux-6.12.1/Documentation/gpu/amdgpu/display/ |
| D | dc-glossary.rst | 36 * SOCCLK: GPU Engine Clock
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_shared_types.h | 347 double SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
973 double SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
1525 double SOCCLK; member
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| D | dml2_core_dcn4.c | 425 …ode_support_result.global.socclk_khz = (unsigned int)(core->clean_me_up.mode_lib.ms.SOCCLK * 1000); in core_dcn4_mode_support()
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| D | dml2_core_shared.c | 772 mode_lib->ms.SOCCLK = ((double)mode_lib->soc.clk_table.socclk.clk_values_khz[0] / 1000); in dml2_core_shared_mode_support()
790 dml2_printf("DML::%s: SOCCLK = %f\n", __func__, mode_lib->ms.SOCCLK); in dml2_core_shared_mode_support()
2679 CalculateWatermarks_params->SOCCLK = mode_lib->ms.SOCCLK; in dml2_core_shared_mode_support()
8763 …atermark = p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8772 …eLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8773 …hangeLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024 / 32 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
9843 s->SOCCLK = (double)programming->min_clocks.dcn4x.socclk_khz / 1000; in dml2_core_shared_mode_programming()
9900 dml2_assert(s->SOCCLK > 0); in dml2_core_shared_mode_programming()
9921 dml2_printf("DML::%s: SOCCLK = %f\n", __func__, s->SOCCLK); in dml2_core_shared_mode_programming()
11075 CalculateWatermarks_params->SOCCLK = s->SOCCLK; in dml2_core_shared_mode_programming()
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| D | dml2_core_dcn4_calcs.c | 6464 …atermark = p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6473 …eLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6474 …hangeLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024 / 32 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
7046 mode_lib->ms.SOCCLK = ((double)mode_lib->soc.clk_table.socclk.clk_values_khz[0] / 1000); in dml_core_mode_support()
7065 dml2_printf("DML::%s: SOCCLK = %f\n", __func__, mode_lib->ms.SOCCLK); in dml_core_mode_support()
9048 CalculateWatermarks_params->SOCCLK = mode_lib->ms.SOCCLK; in dml_core_mode_support()
10012 s->SOCCLK = (double)programming->min_clocks.dcn4x.socclk_khz / 1000; in dml_core_mode_programming()
10069 dml2_assert(s->SOCCLK > 0); in dml_core_mode_programming()
10090 dml2_printf("DML::%s: SOCCLK = %f\n", __func__, s->SOCCLK); in dml_core_mode_programming()
11251 CalculateWatermarks_params->SOCCLK = s->SOCCLK; in dml_core_mode_programming()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_mode_vba_util_32.h | 810 double SOCCLK,
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| D | display_mode_vba_util_32.c | 4264 double SOCCLK, in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() argument
4362 + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4375 + mmSOCParameters.WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4377 + mmSOCParameters.WritebackLatency + v->WritebackChunkSize * 1024 / 32 / SOCCLK; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | display_mode_core_structs.h | 776 dml_float_t SOCCLK; /// <brief Basically just the clock freq at the min (or given) state member
1289 dml_float_t SOCCLK; member
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| D | display_mode_core.c | 2860 …atermark = p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2869 …eLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2870 …hangeLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024 / 32 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6662 CalculateWatermarks_params->SOCCLK = mode_lib->ms.state.socclk_mhz; in dml_prefetch_check()
8236 mode_lib->ms.SOCCLK = mode_lib->ms.state.socclk_mhz; in dml_core_mode_support()
8330 dml_print("DML::%s: Using SOCCLK = %f\n", __func__, mode_lib->ms.SOCCLK); in dml_core_mode_programming()
9424 CalculateWatermarks_params->SOCCLK = mode_lib->ms.SOCCLK; in dml_core_mode_programming()
10070 mode_lib->ms.SOCCLK = (dml_float_t)state->socclk_mhz; in fetch_socbb_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 381 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
1094 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
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| D | display_mode_vba.h | 437 double SOCCLK; member
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| D | smu_v13_0_5_ppt.c | 112 FEA_MAP_REVERSE(SOCCLK),
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| D | smu_v13_0_4_ppt.c | 117 FEA_MAP_REVERSE(SOCCLK),
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| D | yellow_carp_ppt.c | 112 FEA_MAP_REVERSE(SOCCLK),
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| D | aldebaran_ppt.c | 160 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_mode_vba_21.c | 305 double SOCCLK,
2437 mode_lib->vba.SOCCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5226 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml21_ModeSupportAndSystemConfigurationFull()
5262 double SOCCLK, in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
5351 + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5358 + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 312 double SOCCLK,
2759 v->SOCCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5184 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel]; in dml30_ModeSupportAndSystemConfigurationFull()
5208 double SOCCLK, in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
5291 *WritebackUrgentWatermark = WritebackLatency + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5297 …atermark = DRAMClockChangeLatency + WritebackLatency + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK; in CalculateWatermarksAndDRAMSpeedChangeSupport()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| D | renoir_ppt.c | 118 CLK_MAP(SOCCLK, CLOCK_SOCCLK),
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_mode_vba_31.c | 299 double SOCCLK,
2944 v->SOCCLK,
5539 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5552 double SOCCLK, argument
5614 …v->WritebackUrgentWatermark = v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
5620 …= v->DRAMClockChangeLatency + v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_mode_vba_314.c | 308 double SOCCLK,
2963 v->SOCCLK,
5633 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel];
5646 double SOCCLK, argument
5708 …v->WritebackUrgentWatermark = v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
5714 …= v->DRAMClockChangeLatency + v->WritebackLatency + v->WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| D | smu_v14_0_0_ppt.c | 154 FEA_MAP_REVERSE(SOCCLK),
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_mode_vba_20.c | 1502 / mode_lib->vba.SOCCLK; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1514 DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1525 / mode_lib->vba.SOCCLK; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5103 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml20_ModeSupportAndSystemConfigurationFull()
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| D | display_mode_vba_20v2.c | 1538 / mode_lib->vba.SOCCLK; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1550 DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1561 / mode_lib->vba.SOCCLK; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5219 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel]; in dml20v2_ModeSupportAndSystemConfigurationFull()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | vangogh_ppt.c | 188 FEA_MAP_REVERSE(SOCCLK),
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| D | arcturus_ppt.c | 167 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
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