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Searched refs:SMU7_Discrete_GraphicsLevel (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Dsmu7_discrete.h101 struct SMU7_Discrete_GraphicsLevel { struct
129 typedef struct SMU7_Discrete_GraphicsLevel SMU7_Discrete_GraphicsLevel; argument
309 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS];
Dci_dpm.c3117 SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
3174 SMU7_Discrete_GraphicsLevel *graphic_level) in ci_populate_single_graphic_level()
3238 u32 level_array_size = sizeof(SMU7_Discrete_GraphicsLevel) * in ci_populate_all_graphic_levels()
3240 SMU7_Discrete_GraphicsLevel *levels = pi->smc_state_table.GraphicsLevel; in ci_populate_all_graphic_levels()
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu7_discrete.h103 struct SMU7_Discrete_GraphicsLevel struct
132 typedef struct SMU7_Discrete_GraphicsLevel SMU7_Discrete_GraphicsLevel; argument
323 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS];
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dci_smumgr.c298 uint32_t clock, struct SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
409 uint32_t clock, struct SMU7_Discrete_GraphicsLevel *level) in ci_populate_single_graphic_level()
480 uint32_t array_size = sizeof(struct SMU7_Discrete_GraphicsLevel) * in ci_populate_all_graphic_levels()
482 struct SMU7_Discrete_GraphicsLevel *levels = in ci_populate_all_graphic_levels()
2767 struct SMU7_Discrete_GraphicsLevel *levels = in ci_update_dpm_settings()
2792 clk_activity_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2793 + offsetof(SMU7_Discrete_GraphicsLevel, ActivityLevel); in ci_update_dpm_settings()
2804 up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2805 + offsetof(SMU7_Discrete_GraphicsLevel, UpH); in ci_update_dpm_settings()
2806 down_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
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