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Searched refs:SMC_SYSCON_CLOCK_CNTL_0 (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/ !
Dci_smc.c139 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in ci_stop_smc_clock()
143 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in ci_stop_smc_clock()
148 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in ci_start_smc_clock()
152 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in ci_start_smc_clock()
157 u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in ci_is_smc_running()
176 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);
Dsi_smc.c145 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in si_stop_smc_clock()
149 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in si_stop_smc_clock()
154 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in si_start_smc_clock()
158 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in si_start_smc_clock()
164 u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in si_is_smc_running()
202 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in si_wait_for_smc_inactive()
Dsid.h70 #define SMC_SYSCON_CLOCK_CNTL_0 0x80000004 macro
Dcikd.h74 #define SMC_SYSCON_CLOCK_CNTL_0 0x80000004 macro
/linux-6.12.1/drivers/gpu/drm/amd/pm/legacy-dpm/ !
Dsi_smc.c143 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in amdgpu_si_smc_clock()
150 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in amdgpu_si_smc_clock()
156 u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in amdgpu_si_is_smc_running()
194 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in amdgpu_si_wait_for_smc_inactive()
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/ !
Dsmu7_smumgr.c162 …== PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disab… in smu7_is_smc_ram_running()
Dci_smumgr.c189 CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) in ci_is_smc_ram_running()
1901 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in ci_start_smc()
2363 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 1); in ci_upload_firmware()
2952 SMC_SYSCON_CLOCK_CNTL_0, in ci_stop_smc_clock()
Dvegam_smumgr.c119 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in vegam_start_smu_in_protection_mode()
179 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in vegam_start_smu_in_non_protection_mode()
Dfiji_smumgr.c119 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in fiji_start_smu_in_protection_mode()
185 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in fiji_start_smu_in_non_protection_mode()
Diceland_smumgr.c128 SMC_SYSCON_CLOCK_CNTL_0, in iceland_stop_smc_clock()
135 SMC_SYSCON_CLOCK_CNTL_0, in iceland_start_smc_clock()
Dpolaris10_smumgr.c219 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in polaris10_start_smu_in_protection_mode()
279 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in polaris10_start_smu_in_non_protection_mode()
Dtonga_smumgr.c115 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in tonga_start_in_protection_mode()
181 SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); in tonga_start_in_non_protection_mode()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ !
Dcik.c1941 if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) && in cik_need_reset_on_init()
Dsid.h71 #define SMC_SYSCON_CLOCK_CNTL_0 0x80000004 macro
Dvi.c1421 if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) && in vi_need_reset_on_init()