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Searched refs:SDMA1_QUEUE2_MIDCMD_DATA10__DATA10_MASK (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h4088 #define SDMA1_QUEUE2_MIDCMD_DATA10__DATA10_MASK … macro
Dgc_12_0_0_sh_mask.h4451 #define SDMA1_QUEUE2_MIDCMD_DATA10__DATA10_MASK … macro
Dgc_11_0_3_sh_mask.h4204 #define SDMA1_QUEUE2_MIDCMD_DATA10__DATA10_MASK … macro