Searched refs:SDMA1 (Results 1 – 14 of 14) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | sdma_v4_0.c | 150 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100), 151 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100), 152 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), 153 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_IB_CNTL, 0x800f0100, 0x00000100), 154 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), 155 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_POWER_CNTL, 0x003ff000, 0x0003c000), 156 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_IB_CNTL, 0x800f0100, 0x00000100), 157 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), 158 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_IB_CNTL, 0x800f0100, 0x00000100), 159 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), [all …]
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D | amdgpu_amdkfd_gfx_v12.c | 89 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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D | amdgpu_amdkfd_arcturus.c | 85 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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D | soc24.c | 122 { SOC15_REG_ENTRY(SDMA1, 0, regSDMA1_STATUS_REG)},
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D | amdgpu_amdkfd_gfx_v11.c | 138 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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D | soc21.c | 264 { SOC15_REG_ENTRY(SDMA1, 0, regSDMA1_STATUS_REG)},
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D | nv.c | 343 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
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D | amdgpu_amdkfd_gfx_v10.c | 173 SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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D | sdma_v2_4.c | 280 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v2_4_ring_emit_hdp_flush()
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D | amdgpu_amdkfd_gfx_v9.c | 198 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
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D | soc15.c | 366 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
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D | sdma_v3_0.c | 456 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v3_0_ring_emit_hdp_flush()
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | cik_sdma.c | 179 ref_and_mask = SDMA1; in cik_sdma_hdp_flush_ring_emit()
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D | cikd.h | 861 #define SDMA1 (1 << 11) macro
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