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Searched refs:SDMA0_QUEUE3_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h1700 #define SDMA0_QUEUE3_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
Dgc_11_0_0_sh_mask.h1700 #define SDMA0_QUEUE3_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
Dgc_12_0_0_sh_mask.h1695 #define SDMA0_QUEUE3_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro
Dgc_11_0_3_sh_mask.h1755 #define SDMA0_QUEUE3_RB_WPTR_POLL_ADDR_HI__ADDR__SHIFT … macro