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Searched refs:SDMA0_BA_THRESHOLD__WRITE_THRES_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h653 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
Dsdma0_4_0_sh_mask.h654 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK 0x03FF0000L macro
Dsdma0_4_2_sh_mask.h656 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
Dsdma0_4_2_2_sh_mask.h662 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_sh_mask.h1157 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK 0x3ff0000 macro
Doss_3_0_1_sh_mask.h1177 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK 0x3ff0000 macro
Doss_3_0_sh_mask.h1711 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK 0x3ff0000 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h347 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h332 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
Dgc_11_0_0_sh_mask.h321 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
Dgc_11_0_3_sh_mask.h339 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
Dgc_10_1_0_sh_mask.h368 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro
Dgc_10_3_0_sh_mask.h333 #define SDMA0_BA_THRESHOLD__WRITE_THRES_MASK … macro