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Searched refs:SDMA0_BASE__INST5_SEG4 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h709 #define SDMA0_BASE__INST5_SEG4 0 macro
Dsienna_cichlid_ip_offset.h906 #define SDMA0_BASE__INST5_SEG4 0 macro
Dbeige_goby_ip_offset.h1066 #define SDMA0_BASE__INST5_SEG4 0 macro
Drenoir_ip_offset.h1149 #define SDMA0_BASE__INST5_SEG4 0 macro
Dyellow_carp_offset.h1159 #define SDMA0_BASE__INST5_SEG4 0 macro
Darct_ip_offset.h955 #define SDMA0_BASE__INST5_SEG4 0 macro
Daldebaran_ip_offset.h1238 #define SDMA0_BASE__INST5_SEG4 0 macro