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Searched refs:SDMA0_BASE__INST5_SEG0 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h705 #define SDMA0_BASE__INST5_SEG0 0 macro
Dsienna_cichlid_ip_offset.h902 #define SDMA0_BASE__INST5_SEG0 0 macro
Dbeige_goby_ip_offset.h1062 #define SDMA0_BASE__INST5_SEG0 0 macro
Drenoir_ip_offset.h1145 #define SDMA0_BASE__INST5_SEG0 0 macro
Dyellow_carp_offset.h1155 #define SDMA0_BASE__INST5_SEG0 0 macro
Darct_ip_offset.h951 #define SDMA0_BASE__INST5_SEG0 0 macro
Daldebaran_ip_offset.h1234 #define SDMA0_BASE__INST5_SEG0 0 macro