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Searched refs:SDMA0_BASE__INST3_SEG1 (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h692 #define SDMA0_BASE__INST3_SEG1 0 macro
Dsienna_cichlid_ip_offset.h891 #define SDMA0_BASE__INST3_SEG1 0 macro
Dbeige_goby_ip_offset.h1049 #define SDMA0_BASE__INST3_SEG1 0 macro
Drenoir_ip_offset.h1134 #define SDMA0_BASE__INST3_SEG1 0 macro
Dvega10_ip_offset.h1012 #define SDMA0_BASE__INST3_SEG1 0 macro
Dyellow_carp_offset.h1142 #define SDMA0_BASE__INST3_SEG1 0 macro
Darct_ip_offset.h938 #define SDMA0_BASE__INST3_SEG1 0 macro
Daldebaran_ip_offset.h1221 #define SDMA0_BASE__INST3_SEG1 0 macro