/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | rv770_dpm.c | 135 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in rv770_gfx_clock_gating_enable() 137 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in rv770_gfx_clock_gating_enable() 138 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in rv770_gfx_clock_gating_enable() 139 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in rv770_gfx_clock_gating_enable() 174 if (RREG32(SCLK_PWRMGT_CNTL) & DYN_GFX_CLK_OFF_EN) in rv770_restore_cgcg() 178 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in rv770_restore_cgcg() 183 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in rv770_start_dpm() 201 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in rv770_stop_dpm() 855 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in rv770_program_tp() 857 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in rv770_program_tp() [all …]
|
D | cypress_dpm.c | 102 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); 103 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); 104 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); 140 WREG32_P(SCLK_PWRMGT_CNTL, DYN_LIGHT_SLEEP_EN, ~DYN_LIGHT_SLEEP_EN); in cypress_gfx_clock_gating_enable() 142 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in cypress_gfx_clock_gating_enable() 144 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in cypress_gfx_clock_gating_enable() 145 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in cypress_gfx_clock_gating_enable() 146 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in cypress_gfx_clock_gating_enable() 150 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_LIGHT_SLEEP_EN); in cypress_gfx_clock_gating_enable() 247 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in cypress_enable_sclk_control() [all …]
|
D | sumo_dpm.c | 89 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in sumo_gfx_clockgating_enable() 91 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in sumo_gfx_clockgating_enable() 92 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in sumo_gfx_clockgating_enable() 93 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in sumo_gfx_clockgating_enable() 439 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in sumo_program_tp() 441 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in sumo_program_tp() 444 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in sumo_program_tp() 447 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in sumo_program_tp() 915 WREG32_P(SCLK_PWRMGT_CNTL, FIR_RESET, ~FIR_RESET); in sumo_reset_am() 920 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_RESET); in sumo_start_am()
|
D | r600_dpm.c | 245 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in r600_gfx_clockgating_enable() 247 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in r600_gfx_clockgating_enable() 304 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in r600_enable_sclk_control() 306 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in r600_enable_sclk_control() 359 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in r600_select_td() 361 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in r600_select_td() 363 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in r600_select_td() 365 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in r600_select_td()
|
D | rv730d.h | 83 #define SCLK_PWRMGT_CNTL 0x644 macro
|
D | trinity_dpm.c | 398 WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN); in trinity_gfx_clockgating_enable() 400 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); in trinity_gfx_clockgating_enable() 401 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); in trinity_gfx_clockgating_enable() 402 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON); in trinity_gfx_clockgating_enable() 461 WREG32_P(SCLK_PWRMGT_CNTL, DYN_PWR_DOWN_EN, ~DYN_PWR_DOWN_EN); in trinity_gfx_powergating_enable() 463 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_PWR_DOWN_EN); in trinity_gfx_powergating_enable() 725 if (RREG32(SCLK_PWRMGT_CNTL) & DYNAMIC_PM_EN) in trinity_wait_for_dpm_enabled() 756 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~(RESET_SCLK_CNT | RESET_BUSY_CNT)); in trinity_start_am() 761 WREG32_P(SCLK_PWRMGT_CNTL, RESET_SCLK_CNT | RESET_BUSY_CNT, in trinity_reset_am()
|
D | trinityd.h | 175 #define SCLK_PWRMGT_CNTL 0x678 macro
|
D | rv730_dpm.c | 450 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in rv730_start_dpm() 468 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in rv730_stop_dpm()
|
D | sumod.h | 152 #define SCLK_PWRMGT_CNTL 0x644 macro
|
D | ci_dpm.c | 1495 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_start_dpm() 1497 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_start_dpm() 1556 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_stop_dpm() 1558 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_stop_dpm() 1579 u32 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_enable_sclk_control() 1585 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_enable_sclk_control() 2019 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_program_vc() 2021 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_program_vc() 2037 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); in ci_clear_vc() 2039 WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); in ci_clear_vc()
|
D | kv_dpm.c | 502 u32 sclk_pwrmgt_cntl = RREG32_SMC(SCLK_PWRMGT_CNTL); in kv_start_am() 507 WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl); in kv_start_am() 512 u32 sclk_pwrmgt_cntl = RREG32_SMC(SCLK_PWRMGT_CNTL); in kv_reset_am() 516 WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl); in kv_reset_am()
|
D | rv770d.h | 158 #define SCLK_PWRMGT_CNTL 0x644 macro
|
D | nid.h | 599 #define SCLK_PWRMGT_CNTL 0x644 macro
|
D | si_dpm.c | 3282 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control() 3284 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control() 3713 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in si_program_tp() 3715 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in si_program_tp() 3718 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in si_program_tp() 3721 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in si_program_tp()
|
D | sid.h | 251 #define SCLK_PWRMGT_CNTL 0x788 macro
|
D | cikd.h | 109 #define SCLK_PWRMGT_CNTL 0xC0200008 macro
|
D | ni_dpm.c | 1205 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN); 1206 WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON); 1207 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
|
D | evergreend.h | 137 #define SCLK_PWRMGT_CNTL 0x644 macro
|
D | r600d.h | 1307 #define SCLK_PWRMGT_CNTL 0x620 macro
|
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | smu7_hwmgr.c | 482 SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 0); in smu7_program_voting_clients() 484 SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 0); in smu7_program_voting_clients() 499 SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 1); in smu7_clear_voting_clients() 501 SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 1); in smu7_clear_voting_clients() 1102 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL, in smu7_enable_sclk_control() 1272 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL, in smu7_start_dpm() 1353 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL, in smu7_stop_dpm()
|
/linux-6.12.1/drivers/gpu/drm/amd/pm/legacy-dpm/ |
D | si_dpm.c | 3799 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control() 3801 WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF); in si_enable_sclk_control() 4237 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL); in si_program_tp() 4239 WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL); in si_program_tp() 4242 WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE); in si_program_tp() 4245 WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE); in si_program_tp()
|
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | sid.h | 252 #define SCLK_PWRMGT_CNTL 0x1e2 macro
|