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Searched refs:SCLK_PWM0 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3308-cru.h30 #define SCLK_PWM0 26 macro
Dpx30-cru.h36 #define SCLK_PWM0 34 macro
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3308.dtsi503 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
514 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
525 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
536 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
Dpx30.dtsi669 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
680 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
691 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
702 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
/linux-6.12.1/drivers/clk/rockchip/
Dclk-px30.c738 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_gpll_xin24m_p, 0,
Dclk-rk3308.c393 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_dpll_vpll0_xin24m_p, 0,