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Searched refs:SCLK_PCIEPHY_REF (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/phy/
Drockchip-pcie-phy.txt31 clocks = <&cru SCLK_PCIEPHY_REF>;
/linux-6.12.1/include/dt-bindings/clock/
Drk3399-cru.h95 #define SCLK_PCIEPHY_REF 138 macro
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3399-nanopi4.dtsi508 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
Drk3399-base.dtsi1687 clocks = <&cru SCLK_PCIEPHY_REF>;
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3399.c916 MUX(SCLK_PCIEPHY_REF, "clk_pciephy_ref", mux_pll_src_24m_pciephy_p, CLK_SET_RATE_PARENT,