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Searched refs:SCLK_OTGPHY1 (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3188-cru-common.h38 #define SCLK_OTGPHY1 82 macro
Drk3128-cru.h57 #define SCLK_OTGPHY1 143 macro
Drk3228-cru.h66 #define SCLK_OTGPHY1 143 macro
Drk3288-cru.h49 #define SCLK_OTGPHY1 94 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3128.c387 GATE(SCLK_OTGPHY1, "sclk_otgphy1", "xin12m", 0,
Dclk-rk3228.c463 GATE(SCLK_OTGPHY1, "sclk_otgphy1", "xin24m", 0,
Dclk-rk3188.c351 GATE(SCLK_OTGPHY1, "sclk_otgphy1", "xin24m", CLK_IGNORE_UNUSED,
Dclk-rk3288.c560 GATE(SCLK_OTGPHY1, "sclk_otgphy1", "xin24m", CLK_IGNORE_UNUSED,
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3188.dtsi665 clocks = <&cru SCLK_OTGPHY1>;
Drk3066a.dtsi722 clocks = <&cru SCLK_OTGPHY1>;
Drk322x.dtsi286 clocks = <&cru SCLK_OTGPHY1>;
Drk3288.dtsi927 clocks = <&cru SCLK_OTGPHY1>;