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Searched refs:SCLK_NANDC (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3036-cru.h22 #define SCLK_NANDC 76 macro
Drk3128-cru.h21 #define SCLK_NANDC 67 macro
Drk3228-cru.h19 #define SCLK_NANDC 67 macro
Drk3308-cru.h49 #define SCLK_NANDC 45 macro
Drv1108-cru.h18 #define SCLK_NANDC 67 macro
Dpx30-cru.h57 #define SCLK_NANDC 55 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3036.c340 COMPOSITE(SCLK_NANDC, "sclk_nandc", mux_pll_src_3plls_p, 0,
Dclk-rk3128.c445 COMPOSITE(SCLK_NANDC, "sclk_nandc", mux_pll_src_3plls_p, 0,
Dclk-rk3228.c501 COMPOSITE(SCLK_NANDC, "sclk_nandc", mux_pll_src_2plls_p, 0,
Dclk-rv1108.c734 COMPOSITE(SCLK_NANDC, "sclk_nandc", mux_pll_src_2plls_p, 0,
Dclk-px30.c474 COMPOSITE_NODIV(SCLK_NANDC, "clk_nandc", mux_nandc_p,
Dclk-rk3308.c483 …COMPOSITE_NODIV(SCLK_NANDC, "clk_nandc", mux_nandc_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARE…
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3036.dtsi320 clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
322 assigned-clocks = <&cru SCLK_NANDC>;
Drv1108.dtsi455 clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
457 assigned-clocks = <&cru SCLK_NANDC>;
Drk3128.dtsi528 clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Dpx30.dtsi298 <&cru SCLK_NANDC>,
1054 clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
1056 assigned-clocks = <&cru SCLK_NANDC>;
Drk3308.dtsi780 clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
782 assigned-clocks = <&cru SCLK_NANDC>;