Searched refs:SCLK_I2S0 (Results 1 – 20 of 20) sorted by relevance
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 31 #define SCLK_I2S0 75 macro
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| D | rk3128-cru.h | 28 #define SCLK_I2S0 80 macro
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| D | rk3228-cru.h | 27 #define SCLK_I2S0 80 macro
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| D | rv1108-cru.h | 25 #define SCLK_I2S0 75 macro
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| D | rk3288-cru.h | 37 #define SCLK_I2S0 82 macro
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| D | rk3328-cru.h | 30 #define SCLK_I2S0 41 macro
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| /linux-6.12.1/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 547 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, CLK_SET_RATE_PARENT,
672 MUX(SCLK_I2S0, "sclk_i2s0", mux_sclk_i2s0_p, CLK_SET_RATE_PARENT,
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| D | clk-rk3128.c | 358 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3228.c | 424 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rv1108.c | 508 GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3328.c | 377 GATE(SCLK_I2S0, "clk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
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| D | clk-rk3288.c | 370 GATE(SCLK_I2S0, "sclk_i2s0", "i2s_pre", CLK_SET_RATE_PARENT,
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| /linux-6.12.1/arch/arm/boot/dts/rockchip/ |
| D | rk3288-firefly-reload.dts | 222 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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| D | rk3188-bqedison2qc.dts | 451 clocks = <&cru SCLK_I2S0>;
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| D | rk3188.dtsi | 171 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
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| D | rk3066a.dtsi | 182 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
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| D | rk322x.dtsi | 157 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
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| D | rk3128.dtsi | 430 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>;
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| D | rk3288.dtsi | 974 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
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| /linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
| D | rk3328.dtsi | 246 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
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