Searched refs:S1DREG_BBLT_CTL0 (Results 1 – 2 of 2) sorted by relevance
413 while (s1d13xxxfb_readreg(info->par, S1DREG_BBLT_CTL0) & bit) { in bltbit_wait_bitclear()487 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x0); in s1d13xxxfb_bitblt_copyarea()506 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x80); in s1d13xxxfb_bitblt_copyarea()576 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x0); in s1d13xxxfb_bitblt_solidfill()589 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x80); in s1d13xxxfb_bitblt_solidfill()
108 #define S1DREG_BBLT_CTL0 0x0100 /* BitBLT Control Register 0 */ macro