Searched refs:R_BE_REG_PL1_MASK (Results 1 – 2 of 2) sorted by relevance
314 val32 = rtw89_read32(rtwdev, R_BE_REG_PL1_MASK); in rtw89_pci_ser_setting_be()317 rtw89_write32(rtwdev, R_BE_REG_PL1_MASK, val32); in rtw89_pci_ser_setting_be()562 rtw89_write32_clr(rtwdev, R_BE_REG_PL1_MASK, B_BE_SER_PM_MASTER_IMR); in rtw89_pci_suspend_be()585 rtw89_write32_set(rtwdev, R_BE_REG_PL1_MASK, B_BE_SER_PM_MASTER_IMR); in rtw89_pci_resume_be()
960 #define R_BE_REG_PL1_MASK 0x34B0 macro