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Searched refs:R_BCM1480_IMR_MAILBOX_0_CPU (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/arch/mips/sibyte/bcm1480/
Dsmp.c40 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
41 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
42 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
43 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
/linux-6.12.1/arch/mips/include/asm/sibyte/
Dbcm1480_regs.h375 #define R_BCM1480_IMR_MAILBOX_0_CPU 0x00C0 macro
421 (R_BCM1480_IMR_MAILBOX_0_CPU + reg))