Home
last modified time | relevance | path

Searched refs:RST_BUS_SPI0 (Results 1 – 25 of 33) sorted by relevance

12

/linux-6.12.1/include/dt-bindings/reset/
Dsuniv-ccu-f1c100s.h15 #define RST_BUS_SPI0 5 macro
Dsun8i-v3s-ccu.h61 #define RST_BUS_SPI0 15 macro
Dsun8i-a23-a33-ccu.h59 #define RST_BUS_SPI0 13 macro
Dsun8i-a83t-ccu.h63 #define RST_BUS_SPI0 15 macro
Dsun50i-a64-ccu.h62 #define RST_BUS_SPI0 16 macro
Dsun9i-a80-ccu.h56 #define RST_BUS_SPI0 10 macro
Dsun8i-h3-ccu.h63 #define RST_BUS_SPI0 15 macro
Dsun50i-h616-ccu.h37 #define RST_BUS_SPI0 28 macro
Dsun50i-a100-ccu.h36 #define RST_BUS_SPI0 27 macro
Dsun50i-h6-ccu.h40 #define RST_BUS_SPI0 31 macro
Dsun20i-d1-ccu.h38 #define RST_BUS_SPI0 28 macro
Dsun8i-r40-ccu.h65 #define RST_BUS_SPI0 17 macro
/linux-6.12.1/drivers/clk/sunxi-ng/
Dccu-sun8i-v3s.c660 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
695 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-sun8i-h3.c897 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
960 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-suniv-f1c100s.c487 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-sun8i-a23.c686 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-sun8i-a33.c731 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-sun50i-a64.c880 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-sun8i-a83t.c816 [RST_BUS_SPI0] = { 0x2c0, BIT(20) },
Dccu-sun50i-h616.c1023 [RST_BUS_SPI0] = { 0x96c, BIT(16) },
Dccu-sun50i-a100.c1093 [RST_BUS_SPI0] = { 0x96c, BIT(16) },
Dccu-sun9i-a80.c1123 [RST_BUS_SPI0] = { 0x5a0, BIT(20) },
Dccu-sun50i-h6.c1112 [RST_BUS_SPI0] = { 0x96c, BIT(16) },
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsuniv-f1c100s.dtsi79 resets = <&ccu RST_BUS_SPI0>;
Dsun8i-v3s.dtsi627 resets = <&ccu RST_BUS_SPI0>;

12