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Searched refs:RST_BUS_I2C1 (Results 1 – 25 of 37) sorted by relevance

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/linux-6.12.1/include/dt-bindings/reset/
Dsuniv-ccu-f1c100s.h32 #define RST_BUS_I2C1 22 macro
Dsun8i-v3s-ccu.h73 #define RST_BUS_I2C1 47 macro
Dsun8i-a23-a33-ccu.h79 #define RST_BUS_I2C1 33 macro
Dsun8i-a83t-ccu.h90 #define RST_BUS_I2C1 38 macro
Dsun50i-a64-ccu.h89 #define RST_BUS_I2C1 43 macro
Dsun9i-a80-ccu.h91 #define RST_BUS_I2C1 41 macro
Dsun8i-h3-ccu.h95 #define RST_BUS_I2C1 47 macro
Dsun50i-h616-ccu.h33 #define RST_BUS_I2C1 24 macro
Dsun50i-a100-ccu.h33 #define RST_BUS_I2C1 24 macro
Dsun50i-h6-ccu.h35 #define RST_BUS_I2C1 26 macro
Dsun20i-d1-ccu.h35 #define RST_BUS_I2C1 25 macro
Dsun8i-r40-ccu.h113 #define RST_BUS_I2C1 65 macro
/linux-6.12.1/drivers/clk/sunxi-ng/
Dccu-sun8i-v3s.c676 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
712 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
Dccu-sun8i-h3.c933 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
996 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
Dccu-suniv-f1c100s.c504 [RST_BUS_I2C1] = { 0x2d0, BIT(17) },
Dccu-sun8i-a23.c709 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
Dccu-sun8i-a33.c755 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
Dccu-sun50i-a64.c911 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
Dccu-sun8i-a83t.c839 [RST_BUS_I2C1] = { 0x2d8, BIT(1) },
Dccu-sun50i-h616.c1019 [RST_BUS_I2C1] = { 0x91c, BIT(17) },
Dccu-sun50i-a100.c1090 [RST_BUS_I2C1] = { 0x91c, BIT(17) },
Dccu-sun9i-a80.c1162 [RST_BUS_I2C1] = { 0x5b4, BIT(1) },
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsuniv-f1c100s.dtsi236 resets = <&ccu RST_BUS_I2C1>;
Dsun8i-v3s.dtsi568 resets = <&ccu RST_BUS_I2C1>;
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-a100.dtsi238 resets = <&ccu RST_BUS_I2C1>;

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