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Searched refs:RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8122 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT 0x4 macro
Dgfx_8_1_sh_mask.h9574 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT 0x4 macro
Dgfx_8_0_sh_mask.h9034 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT 0x4 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h19826 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_9_1_sh_mask.h21133 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_9_4_3_sh_mask.h23188 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_9_2_1_sh_mask.h21060 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_9_4_2_sh_mask.h13266 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_11_5_0_sh_mask.h23212 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_11_0_0_sh_mask.h27179 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_12_0_0_sh_mask.h15008 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_11_0_3_sh_mask.h29700 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_10_1_0_sh_mask.h27798 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro
Dgc_10_3_0_sh_mask.h26077 #define RLC_GPM_PERF_COUNT_1__SE_INDEX__SHIFT … macro