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Searched refs:RK3588_PLLCON0_M_SHIFT (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/clk/rockchip/
Dclk-pll.c851 #define RK3588_PLLCON0_M_SHIFT 0 macro
886 rate->m = ((pllcon >> RK3588_PLLCON0_M_SHIFT) & RK3588_PLLCON0_M_MASK); in rockchip_rk3588_pll_get_params()
953 writel_relaxed(HIWORD_UPDATE(rate->m, RK3588_PLLCON0_M_MASK, RK3588_PLLCON0_M_SHIFT), in rockchip_rk3588_pll_set_params()