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Searched refs:RISCV_ISA_EXT_SMSTATEEN (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/arch/riscv/include/asm/
Dhwcap.h52 #define RISCV_ISA_EXT_SMSTATEEN 43 macro
/linux-6.12.1/arch/riscv/kvm/
Dvcpu.c547 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) { in kvm_riscv_vcpu_setup_config()
580 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) { in kvm_arch_vcpu_load()
695 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN) && in kvm_riscv_vcpu_swap_in_guest_state()
708 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN) && in kvm_riscv_vcpu_swap_in_host_state()
Dvcpu_onereg.c183 return riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN); in kvm_riscv_vcpu_isa_disable_allowed()
518 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) in kvm_riscv_vcpu_get_reg_csr()
563 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) in kvm_riscv_vcpu_set_reg_csr()
/linux-6.12.1/arch/riscv/kernel/
Dcpufeature.c377 __RISCV_ISA_EXT_DATA(smstateen, RISCV_ISA_EXT_SMSTATEEN),