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Searched refs:RING_FORCE_TO_NONPRIV (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/i915/gvt/
Dmmio_context.c62 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
63 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
64 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
65 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
66 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
67 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
68 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 6), 0, false}, /* 0x24e8 */
69 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 7), 0, false}, /* 0x24ec */
70 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 8), 0, false}, /* 0x24f0 */
71 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 9), 0, false}, /* 0x24f4 */
[all …]
/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_reg_sr.c244 xe_mmio_write32(gt, RING_FORCE_TO_NONPRIV(mmio_base, slot), in xe_reg_sr_apply_whitelist()
253 xe_mmio_write32(gt, RING_FORCE_TO_NONPRIV(mmio_base, slot), addr); in xe_reg_sr_apply_whitelist()
/linux-6.12.1/drivers/gpu/drm/xe/regs/
Dxe_engine_regs.h152 #define RING_FORCE_TO_NONPRIV(base, i) XE_REG(((base) + 0x4d0) + (i) * 4) macro
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_engine_regs.h213 #define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4) macro
Dintel_workarounds.c2146 RING_FORCE_TO_NONPRIV(base, i), in intel_engine_apply_whitelist()
2152 RING_FORCE_TO_NONPRIV(base, i), in intel_engine_apply_whitelist()
Dselftest_workarounds.c157 *cs++ = i915_mmio_reg_offset(RING_FORCE_TO_NONPRIV(base, i)); in read_nonprivs()
/linux-6.12.1/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_ads.c410 RING_FORCE_TO_NONPRIV(base, i), in guc_mmio_regset_init()