Searched refs:RF90_PATH_C (Results 1 – 25 of 25) sorted by relevance
159 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()164 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()180 rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER; in rtl8723_phy_init_bb_rf_reg_def()185 rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE; in rtl8723_phy_init_bb_rf_reg_def()196 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in rtl8723_phy_init_bb_rf_reg_def()201 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1; in rtl8723_phy_init_bb_rf_reg_def()206 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2; in rtl8723_phy_init_bb_rf_reg_def()211 rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBANLANCE; in rtl8723_phy_init_bb_rf_reg_def()216 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in rtl8723_phy_init_bb_rf_reg_def()221 rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTXIQIMBALANCE; in rtl8723_phy_init_bb_rf_reg_def()[all …]
146 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in rtl92d_phy_init_bb_rf_register_definition()156 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in rtl92d_phy_init_bb_rf_register_definition()183 rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER; in rtl92d_phy_init_bb_rf_register_definition()192 rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE; in rtl92d_phy_init_bb_rf_register_definition()212 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in rtl92d_phy_init_bb_rf_register_definition()218 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1; in rtl92d_phy_init_bb_rf_register_definition()224 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2; in rtl92d_phy_init_bb_rf_register_definition()230 rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBALANCE; in rtl92d_phy_init_bb_rf_register_definition()236 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in rtl92d_phy_init_bb_rf_register_definition()242 rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTXIQIMBALANCE; in rtl92d_phy_init_bb_rf_register_definition()[all …]
68 case RF90_PATH_C: in _rtl92ee_phy_rf6052_config_parafile()101 case RF90_PATH_C: in _rtl92ee_phy_rf6052_config_parafile()109 case RF90_PATH_C: in _rtl92ee_phy_rf6052_config_parafile()
995 case RF90_PATH_C: in rtl92ee_phy_config_rf_with_headerfile()
671 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92s_phy_init_register_definition()677 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92s_phy_init_register_definition()683 rtlphy->phyreg_def[RF90_PATH_C].rfintfo = RFPGA0_XC_RFINTERFACEOE; in _rtl92s_phy_init_register_definition()689 rtlphy->phyreg_def[RF90_PATH_C].rfintfe = RFPGA0_XC_RFINTERFACEOE; in _rtl92s_phy_init_register_definition()697 rtlphy->phyreg_def[RF90_PATH_C].rf3wire_offset = in _rtl92s_phy_init_register_definition()705 rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER; in _rtl92s_phy_init_register_definition()711 rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl92s_phy_init_register_definition()717 rtlphy->phyreg_def[RF90_PATH_C].rfhssi_para1 = RFPGA0_XC_HSSIPARAMETER1; in _rtl92s_phy_init_register_definition()723 rtlphy->phyreg_def[RF90_PATH_C].rfhssi_para2 = RFPGA0_XC_HSSIPARAMETER2; in _rtl92s_phy_init_register_definition()729 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92s_phy_init_register_definition()[all …]
415 case RF90_PATH_C: in rtl92s_phy_rf6052_config()451 case RF90_PATH_C: in rtl92s_phy_rf6052_config()460 case RF90_PATH_C: in rtl92s_phy_rf6052_config()
151 case RF90_PATH_C: in rtl92d_phy_rf6052_config()189 case RF90_PATH_C: in rtl92d_phy_rf6052_config()196 case RF90_PATH_C: in rtl92d_phy_rf6052_config()
506 case RF90_PATH_C: in rtl92d_phy_config_rf_with_headerfile()
163 case RF90_PATH_C: in rtl92du_phy_rf6052_config()202 case RF90_PATH_C: in rtl92du_phy_rf6052_config()210 case RF90_PATH_C: in rtl92du_phy_rf6052_config()
498 case RF90_PATH_C: in rtl92du_phy_config_rf_with_headerfile()
402 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()407 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()423 rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER; in _rtl92c_phy_init_bb_rf_register_definition()428 rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl92c_phy_init_bb_rf_register_definition()439 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92c_phy_init_bb_rf_register_definition()444 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1; in _rtl92c_phy_init_bb_rf_register_definition()449 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2; in _rtl92c_phy_init_bb_rf_register_definition()454 rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBANLANCE; in _rtl92c_phy_init_bb_rf_register_definition()459 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in _rtl92c_phy_init_bb_rf_register_definition()464 rtlphy->phyreg_def[RF90_PATH_C].rftxiq_imbal = ROFDM0_XCTXIQIMBALANCE; in _rtl92c_phy_init_bb_rf_register_definition()[all …]
424 case RF90_PATH_C: in _rtl88e_phy_rf6052_config_parafile()457 case RF90_PATH_C: in _rtl88e_phy_rf6052_config_parafile()465 case RF90_PATH_C: in _rtl88e_phy_rf6052_config_parafile()
768 case RF90_PATH_C: in rtl88e_phy_config_rf_with_headerfile()813 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()818 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()834 rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER; in _rtl88e_phy_init_bb_rf_register_definition()839 rtlphy->phyreg_def[RF90_PATH_C].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl88e_phy_init_bb_rf_register_definition()852 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()859 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control1 = ROFDM0_XCAGCCORE1; in _rtl88e_phy_init_bb_rf_register_definition()864 rtlphy->phyreg_def[RF90_PATH_C].rfagc_control2 = ROFDM0_XCAGCCORE2; in _rtl88e_phy_init_bb_rf_register_definition()869 rtlphy->phyreg_def[RF90_PATH_C].rfrxiq_imbal = ROFDM0_XCRXIQIMBANLANCE; in _rtl88e_phy_init_bb_rf_register_definition()874 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in _rtl88e_phy_init_bb_rf_register_definition()[all …]
391 case RF90_PATH_C: in _rtl92c_phy_rf6052_config_parafile()416 case RF90_PATH_C: in _rtl92c_phy_rf6052_config_parafile()423 case RF90_PATH_C: in _rtl92c_phy_rf6052_config_parafile()
253 case RF90_PATH_C: in rtl92cu_phy_config_rf_with_headerfile()
420 case RF90_PATH_C: in _rtl92ce_phy_rf6052_config_parafile()453 case RF90_PATH_C: in _rtl92ce_phy_rf6052_config_parafile()461 case RF90_PATH_C: in _rtl92ce_phy_rf6052_config_parafile()
276 case RF90_PATH_C: in rtl92c_phy_config_rf_with_headerfile()
428 case RF90_PATH_C: in _rtl8723be_phy_rf6052_config_parafile()461 case RF90_PATH_C: in _rtl8723be_phy_rf6052_config_parafile()469 case RF90_PATH_C: in _rtl8723be_phy_rf6052_config_parafile()
762 case RF90_PATH_C: in rtl8723be_phy_config_rf_with_headerfile()
429 case RF90_PATH_C: in _rtl8723e_phy_rf6052_config_parafile()463 case RF90_PATH_C: in _rtl8723e_phy_rf6052_config_parafile()471 case RF90_PATH_C: in _rtl8723e_phy_rf6052_config_parafile()
516 case RF90_PATH_C: in rtl8723e_phy_config_rf_with_headerfile()
424 case RF90_PATH_C: in _rtl8821ae_phy_rf6052_config_parafile()
2068 case RF90_PATH_C: in rtl8812ae_phy_config_rf_with_headerfile()2095 case RF90_PATH_C: in rtl8821ae_phy_config_rf_with_headerfile()
17 #define BTC_RF_C RF90_PATH_C
297 RF90_PATH_C = 2, enumerator