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Searched refs:REG_UPDATE_4 (Results 1 – 25 of 25) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
Ddcn31_hpo_dp_link_encoder.c110 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
119 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
128 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
133 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
142 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
147 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
156 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
161 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
170 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
175 REG_UPDATE_4(DP_DPHY_SYM32_TP_CONFIG, in dcn31_hpo_dp_link_enc_set_link_test_pattern()
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Ddcn31_hpo_dp_stream_encoder.c673 REG_UPDATE_4(DP_SYM32_ENC_SDP_AUDIO_CONTROL0, in dcn31_hpo_dp_stream_enc_audio_disable()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn35/
Ddcn35_optc.c204 REG_UPDATE_4(OTG_CRC_CNTL, in optc35_configure_crc()
234 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc35_setup_manual_trigger()
277 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc35_set_drr()
306 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc35_set_long_vtotal()
318 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc35_set_long_vtotal()
338 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc35_set_long_vtotal()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn30/
Ddcn30_hubp.c138 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp3_program_surface_flip_and_addr()
268 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp3_program_surface_flip_and_addr()
324 REG_UPDATE_4(DCSURF_ADDR_CONFIG, in hubp3_program_tiling()
343 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp3_dcc_control()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn31/
Ddcn31_optc.c209 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
218 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
Ddcn401_dccg.c634 REG_UPDATE_4(DCCG_GATE_DISABLE_CNTL3, in dccg401_set_dp_dto()
642 REG_UPDATE_4(DCCG_GATE_DISABLE_CNTL3, in dccg401_set_dp_dto()
650 REG_UPDATE_4(DCCG_GATE_DISABLE_CNTL3, in dccg401_set_dp_dto()
658 REG_UPDATE_4(DCCG_GATE_DISABLE_CNTL3, in dccg401_set_dp_dto()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn401/
Ddcn401_optc.c301 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc401_setup_manual_trigger()
357 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc401_set_drr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn301/
Ddcn301_optc.c86 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc301_set_drr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_reg.h103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn32/
Ddcn32_hubp.c133 REG_UPDATE_4(CURSOR_CONTROL, in hubp32_cursor_set_attributes()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/opp/dcn20/
Ddcn20_opp.c260 REG_UPDATE_4(DPG_CONTROL, in opp2_set_disp_pattern_generator()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn32/
Ddcn32_optc.c264 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc32_setup_manual_trigger()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
Ddcn10_hubp.c156 REG_UPDATE_4(DCSURF_TILING_CONFIG, in hubp1_program_tiling()
418 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp1_program_surface_flip_and_addr()
528 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp1_dcc_control()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
Ddcn20_hubp.c321 REG_UPDATE_4(DCSURF_TILING_CONFIG, in hubp2_program_tiling()
416 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp2_dcc_control()
611 REG_UPDATE_4(CURSOR_CONTROL, in hubp2_cursor_set_attributes()
772 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp2_program_surface_flip_and_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.c186 REG_UPDATE_4(DMCU_INTERRUPT_TO_UC_EN_MASK, in dce_dmcu_setup_psr()
621 REG_UPDATE_4(DMCU_INTERRUPT_TO_UC_EN_MASK, in dcn10_dmcu_setup_psr()
Ddce_aux.c242 value = REG_UPDATE_4(AUX_SW_DATA, in submit_channel_request()
Ddce_mem_input.c623 REG_UPDATE_4(PRESCALE_GRPH_CONTROL, in program_grph_pixel_format()
Ddce_link_encoder.c152 REG_UPDATE_4(DP_DPHY_CNTL, in disable_prbs_symbols()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn20/
Ddcn20_optc.c460 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc2_setup_manual_trigger()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn10/
Ddcn10_optc.c1034 REG_UPDATE_4(OTG_TEST_PATTERN_CONTROL, in optc1_set_test_pattern()
1134 REG_UPDATE_4(OTG_TEST_PATTERN_CONTROL, in optc1_set_test_pattern()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn401/
Ddcn401_dio_stream_encoder.c580 REG_UPDATE_4(DP_PIXEL_FORMAT, in enc401_stream_encoder_dp_set_stream_attribute()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/
Ddcn21_hubbub.c94 REG_UPDATE_4(DCHVM_CLK_CTRL, in dcn21_dchvm_init()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
Ddcn401_hubp.c438 REG_UPDATE_4(DCSURF_SURFACE_CONTROL, in hubp401_program_surface_flip_and_addr()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dio/dcn10/
Ddcn10_link_encoder.c123 REG_UPDATE_4(DP_DPHY_CNTL, in disable_prbs_symbols()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h245 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ macro