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Searched refs:REG_T1 (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/arch/riscv/include/asm/
Dmodule.h62 #define REG_T1 0x6 macro
85 OPC_LD | (lo12 << 20) | (REG_T0 << 15) | (REG_T1 << 7), in emit_plt_entry()
86 OPC_JALR | (REG_T1 << 15) in emit_plt_entry()
/linux-6.12.1/arch/x86/crypto/
Dsha1_avx2_x86_64_asm.S92 #define REG_T1 %r11d macro
117 .set T1, REG_T1
Dsha1_ssse3_asm.S40 #define REG_T1 %eax macro
197 .set T1, REG_T1
/linux-6.12.1/arch/loongarch/include/asm/
Dloongarch.h36 #define REG_T1 0xd