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Searched refs:REG_S0S1_PATH_SWITCH (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/
D8723b.c507 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00); in rtl8723bu_init_phy_bb()
580 path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8723bu_iqk_path_a()
632 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000); in rtl8723bu_iqk_path_a()
634 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280); in rtl8723bu_iqk_path_a()
649 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel); in rtl8723bu_iqk_path_a()
690 path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8723bu_rx_iqk_path_a()
742 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000); in rtl8723bu_rx_iqk_path_a()
744 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280); in rtl8723bu_rx_iqk_path_a()
759 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel); in rtl8723bu_rx_iqk_path_a()
842 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000); in rtl8723bu_rx_iqk_path_a()
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D8710b.c996 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_iqk_path_a()
998 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x99000000); in rtl8710bu_iqk_path_a()
1046 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_iqk_path_a()
1080 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_rx_iqk_path_a()
1082 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x99000000); in rtl8710bu_rx_iqk_path_a()
1148 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_rx_iqk_path_a()
1219 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_rx_iqk_path_a()
1318 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_phy_iqcalibrate()
1390 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_phy_iqcalibrate()
1418 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_phy_iq_calibrate()
[all …]
D8188f.c442 reg948 = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8188f_spur_calibration()
1114 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8188fu_phy_iqcalibrate()
1200 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8188fu_phy_iqcalibrate()
1231 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8188fu_phy_iq_calibrate()
1314 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8188fu_phy_iq_calibrate()
Dregs.h1009 #define REG_S0S1_PATH_SWITCH 0x0948 /* 8723BU */ macro