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Searched refs:REG_OFDM0_XA_AGC_CORE1 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/
D8188f.c455 initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8188f_spur_calibration()
464 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8188f_spur_calibration()
490 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, initial_gain); in rtl8188f_spur_calibration()
1095 rx_initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8188fu_phy_iqcalibrate()
1204 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8188fu_phy_iqcalibrate()
1207 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8188fu_phy_iqcalibrate()
1208 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8188fu_phy_iqcalibrate()
1211 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8188fu_phy_iqcalibrate()
D8710b.c1288 rx_initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1394 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1396 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1397 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1399 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
D8192e.c1077 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff; in rtl8192eu_phy_iqcalibrate()
1216 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8192eu_phy_iqcalibrate()
1218 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50); in rtl8192eu_phy_iqcalibrate()
1219 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc); in rtl8192eu_phy_iqcalibrate()
D8723b.c921 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff; in rtl8723bu_phy_iqcalibrate()
1082 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8723bu_phy_iqcalibrate()
1084 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50); in rtl8723bu_phy_iqcalibrate()
1085 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc); in rtl8723bu_phy_iqcalibrate()
D8192f.c1285 rx_initial_gain_a = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8192fu_phy_iqcalibrate()
1431 rtl8xxxu_write32_mask(priv, REG_OFDM0_XA_AGC_CORE1, 0xff, 0x50); in rtl8192fu_phy_iqcalibrate()
1432 rtl8xxxu_write32_mask(priv, REG_OFDM0_XA_AGC_CORE1, 0xff, in rtl8192fu_phy_iqcalibrate()
Dregs.h1083 #define REG_OFDM0_XA_AGC_CORE1 0x0c50 macro
Dcore.c7504 rtl8xxxu_write32_mask(priv, REG_OFDM0_XA_AGC_CORE1, in rtl8xxxu_start()