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Searched refs:REG_OFDM0_TRX_PATH_ENABLE (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/
D8192f.c813 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_iqk_path_a()
970 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_rx_iqk_path_a()
1037 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_iqk_path_b()
1135 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_rx_iqk_path_b()
1199 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_rx_iqk_path_b()
1266 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8192fu_phy_iqcalibrate()
1413 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005433); in rtl8192fu_phy_iqcalibrate()
1905 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8192f_enable_rf()
1909 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8192f_enable_rf()
1918 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8192f_disable_rf()
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D8188f.c1084 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8188fu_phy_iqcalibrate()
1118 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8188fu_phy_iqcalibrate()
1613 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188f_enable_rf()
1616 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188f_enable_rf()
1625 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188f_disable_rf()
1627 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188f_disable_rf()
D8710b.c1277 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8710bu_phy_iqcalibrate()
1326 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05601); in rtl8710bu_phy_iqcalibrate()
1727 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_enable_rf()
1730 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_enable_rf()
1739 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_disable_rf()
1741 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_disable_rf()
D8188e.c772 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8188eu_phy_iqcalibrate()
812 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8188eu_phy_iqcalibrate()
1268 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188e_enable_rf()
1271 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188e_enable_rf()
1280 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188e_disable_rf()
1282 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188e_disable_rf()
D8192e.c1072 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8192eu_phy_iqcalibrate()
1103 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8192eu_phy_iqcalibrate()
D8723b.c916 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8723bu_phy_iqcalibrate()
947 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8723bu_phy_iqcalibrate()
Dregs.h1056 #define REG_OFDM0_TRX_PATH_ENABLE 0x0c04 macro
Dcore.c1070 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_gen1_enable_rf()
1078 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_gen1_enable_rf()
1111 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_gen1_disable_rf()
1113 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_gen1_disable_rf()
2319 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_init_phy_bb()
2323 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_init_phy_bb()
3184 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8xxxu_phy_iqcalibrate()
3222 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8xxxu_phy_iqcalibrate()