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Searched refs:REG_FPGA0_XA_RF_INT_OE (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/
D8192e.c1074 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8192eu_phy_iqcalibrate()
1111 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8192eu_phy_iqcalibrate()
1113 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8192eu_phy_iqcalibrate()
D8188e.c774 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8188eu_phy_iqcalibrate()
823 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8188eu_phy_iqcalibrate()
825 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8188eu_phy_iqcalibrate()
Dregs.h930 #define REG_FPGA0_XA_RF_INT_OE 0x0860 /* RF Channel switch */ macro
D8188f.c1086 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8188fu_phy_iqcalibrate()
D8723b.c918 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8723bu_phy_iqcalibrate()
D8710b.c1279 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8710bu_phy_iqcalibrate()
Dcore.c2424 reg_int_oe = REG_FPGA0_XA_RF_INT_OE; in rtl8xxxu_init_phy_rf()
3186 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8xxxu_phy_iqcalibrate()
3233 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8xxxu_phy_iqcalibrate()
3235 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8xxxu_phy_iqcalibrate()
4116 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, 0x66f60210); in rtl8xxxu_init_device()