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Searched refs:REG_FPGA0_RF_MODE (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/net/wireless/realtek/rtl8xxxu/
D8188f.c458 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188f_spur_calibration()
460 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188f_spur_calibration()
486 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188f_spur_calibration()
488 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188f_spur_calibration()
533 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188fu_config_channel()
536 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188fu_config_channel()
544 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188fu_config_channel()
546 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188fu_config_channel()
549 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188fu_config_channel()
552 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188fu_config_channel()
[all …]
D8710b.c715 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
717 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
733 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
736 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
739 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
D8192f.c622 rtl8xxxu_write32_mask(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE, ht40); in rtl8192fu_config_channel()
626 rtl8xxxu_write32_mask(priv, REG_FPGA0_RF_MODE, GENMASK(10, 8), 4); in rtl8192fu_config_channel()
629 rtl8xxxu_write32_mask(priv, REG_FPGA0_RF_MODE, BIT(13) | BIT(12), 2); in rtl8192fu_config_channel()
640 rtl8xxxu_write32_set(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_CCK); in rtl8192fu_config_channel()
795 rtl8xxxu_write32_clear(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_OFDM); in rtl8192f_phy_lc_calibrate()
796 rtl8xxxu_write32_set(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_OFDM); in rtl8192f_phy_lc_calibrate()
Dcore.c1080 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_gen1_enable_rf()
1082 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_gen1_enable_rf()
1116 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_gen1_disable_rf()
1118 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_gen1_disable_rf()
1229 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_gen1_config_channel()
1231 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_gen1_config_channel()
1260 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_gen1_config_channel()
1262 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_gen1_config_channel()
1356 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_gen2_config_channel()
1358 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_gen2_config_channel()
[all …]
D8188e.c441 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188eu_config_channel()
443 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188eu_config_channel()
468 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188eu_config_channel()
470 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8188eu_config_channel()
Dregs.h883 #define REG_FPGA0_RF_MODE 0x0800 macro
D8723b.c919 REG_FPGA0_XB_RF_INT_OE, REG_FPGA0_RF_MODE in rtl8723bu_phy_iqcalibrate()