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Searched refs:REG_CTRL (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/pwm/
Dpwm-vt8500.c28 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00) macro
117 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_config()
119 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_config()
138 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_enable()
140 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_enable()
151 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_disable()
153 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_disable()
166 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_set_polarity()
173 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_set_polarity()
/linux-6.12.1/drivers/rtc/
Drtc-ssd202d.c18 #define REG_CTRL 0x0 macro
158 ssd202d_rtc_read_reg(priv, REG_CTRL, SW0_RD_BIT, &sw0); in ssd202d_rtc_read_time()
163 ssd202d_rtc_read_reg(priv, REG_CTRL, BASE_RD_BIT, &base); in ssd202d_rtc_read_time()
180 val = readw(priv->base + REG_CTRL); in ssd202d_rtc_reset_counter()
181 writew(val | CNT_RST_BIT, priv->base + REG_CTRL); in ssd202d_rtc_reset_counter()
183 writew(val & ~CNT_RST_BIT, priv->base + REG_CTRL); in ssd202d_rtc_reset_counter()
194 ssd202d_rtc_write_reg(priv, REG_CTRL, BASE_WR_BIT, seconds); in ssd202d_rtc_set_time()
196 ssd202d_rtc_write_reg(priv, REG_CTRL, SW0_WR_BIT, 1); in ssd202d_rtc_set_time()
/linux-6.12.1/drivers/i2c/busses/
Di2c-meson.c22 #define REG_CTRL 0x00 macro
170 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, in meson_gxbb_axg_i2c_set_clk_div()
173 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, in meson_gxbb_axg_i2c_set_clk_div()
202 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, in meson6_i2c_set_clk_div()
205 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, in meson6_i2c_set_clk_div()
310 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); in meson_i2c_irq()
311 ctrl = readl(i2c->regs + REG_CTRL); in meson_i2c_irq()
330 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); in meson_i2c_irq()
368 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags); in meson_i2c_xfer_msg()
380 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); in meson_i2c_xfer_msg()
[all …]
/linux-6.12.1/drivers/video/backlight/
Dlm3630a_bl.c19 #define REG_CTRL 0x00 macro
101 rval |= lm3630a_update(pchip, REG_CTRL, 0x14, pdata->leda_ctrl); in lm3630a_chip_init()
102 rval |= lm3630a_update(pchip, REG_CTRL, 0x0B, pdata->ledb_ctrl); in lm3630a_chip_init()
139 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_isr_func()
200 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_a_update_status()
209 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDA_ENABLE, 0); in lm3630a_bank_a_update_status()
211 ret |= lm3630a_update(pchip, REG_CTRL, in lm3630a_bank_a_update_status()
241 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_a_get_brightness()
275 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_b_update_status()
284 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDB_ENABLE, 0); in lm3630a_bank_b_update_status()
[all …]
/linux-6.12.1/drivers/phy/amlogic/
Dphy-meson8b-usb2.c27 #define REG_CTRL 0x04 macro
172 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK, in phy_meson8b_usb2_power_on()
175 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, in phy_meson8b_usb2_power_on()
179 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, in phy_meson8b_usb2_power_on()
182 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, 0); in phy_meson8b_usb2_power_on()
185 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT, in phy_meson8b_usb2_power_on()
227 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, in phy_meson8b_usb2_power_off()
/linux-6.12.1/drivers/clk/
Dclk-apple-nco.c23 #define REG_CTRL 0 macro
82 val = readl_relaxed(chan->base + REG_CTRL); in applnco_enable_nolock()
83 writel_relaxed(val | CTRL_ENABLE, chan->base + REG_CTRL); in applnco_enable_nolock()
91 val = readl_relaxed(chan->base + REG_CTRL); in applnco_disable_nolock()
92 writel_relaxed(val & ~CTRL_ENABLE, chan->base + REG_CTRL); in applnco_disable_nolock()
99 return (readl_relaxed(chan->base + REG_CTRL) & CTRL_ENABLE) != 0; in applnco_is_enabled()
/linux-6.12.1/drivers/mfd/
Dti_am335x_tscadc.c259 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); in ti_tscadc_probe()
264 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); in ti_tscadc_probe()
324 regmap_read(tscadc->regmap, REG_CTRL, &ctrl); in tscadc_suspend()
327 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in tscadc_suspend()
341 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); in tscadc_resume()
343 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); in tscadc_resume()
/linux-6.12.1/drivers/video/fbdev/
Dxilinxfb.c62 #define REG_CTRL 1 macro
234 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); in xilinx_fb_blank()
242 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinx_fb_blank()
312 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); in xilinxfb_assign()
369 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinxfb_assign()
393 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinxfb_release()
/linux-6.12.1/drivers/iio/adc/
Dti_am335x_adc.c164 config = tiadc_readl(adc_dev, REG_CTRL); in tiadc_irq_h()
166 tiadc_writel(adc_dev, REG_CTRL, config); in tiadc_irq_h()
180 tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_SSENB)); in tiadc_irq_h()
708 idle = tiadc_readl(adc_dev, REG_CTRL); in tiadc_suspend()
710 tiadc_writel(adc_dev, REG_CTRL, idle | CNTRLREG_POWERDOWN); in tiadc_suspend()
722 restore = tiadc_readl(adc_dev, REG_CTRL); in tiadc_resume()
724 tiadc_writel(adc_dev, REG_CTRL, restore); in tiadc_resume()
/linux-6.12.1/drivers/spi/
Dspi-meson-spifc.c24 #define REG_CTRL 0x08 macro
254 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, 0); in meson_spifc_transfer_one()
264 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, in meson_spifc_transfer_one()
/linux-6.12.1/include/linux/mfd/
Dti_am335x_tscadc.h22 #define REG_CTRL 0x040 macro