Searched refs:REG_CSR_2L_JCPLL_SDM_HREN (Results 1 – 2 of 2) sorted by relevance
598 airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN, in airoha_pcie_phy_init_jcpll()605 airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN, in airoha_pcie_phy_init_jcpll()607 airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN, in airoha_pcie_phy_init_jcpll()804 airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN, in airoha_pcie_phy_init_ssc_jcpll()805 REG_CSR_2L_JCPLL_SDM_HREN); in airoha_pcie_phy_init_ssc_jcpll()
54 #define REG_CSR_2L_JCPLL_SDM_HREN 0x0024 macro