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Searched refs:REG_ANA_GLB_D0 (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/phy/mediatek/
Dphy-mtk-xfi-tphy.c54 #define REG_ANA_GLB_D0 0x90d0 macro
219 mtk_phy_update_bits(xfi_tphy->base + REG_ANA_GLB_D0, in mtk_xfi_tphy_setup()
225 mtk_phy_set_bits(xfi_tphy->base + REG_ANA_GLB_D0, XTP_GLB_USXGMII_EN); in mtk_xfi_tphy_setup()