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Searched refs:REGV_WR64 (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/accel/ivpu/
Divpu_hw_ip.c897 REGV_WR64(VPU_40XX_HOST_SS_VERIFICATION_ADDRESS_LO, val64); in soc_cpu_boot_40xx()
984 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK_37XX); in ivpu_hw_ip_irq_enable()
987 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK_40XX); in ivpu_hw_ip_irq_enable()
994 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, 0x0ull); in ivpu_hw_ip_irq_disable()
997 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, 0x0ull); in ivpu_hw_ip_irq_disable()
1047 REGV_WR64(VPU_37XX_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK_37XX); in ivpu_hw_ip_irq_clear()
1049 REGV_WR64(VPU_40XX_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK_40XX); in ivpu_hw_ip_irq_clear()
Divpu_mmu.c592 REGV_WR64(IVPU_MMU_REG_STRTAB_BASE, mmu->strtab.dma_q); in ivpu_mmu_reset()
595 REGV_WR64(IVPU_MMU_REG_CMDQ_BASE, mmu->cmdq.dma_q); in ivpu_mmu_reset()
616 REGV_WR64(IVPU_MMU_REG_EVTQ_BASE, mmu->evtq.dma_q); in ivpu_mmu_reset()
Divpu_hw_reg_io.h28 #define REGV_WR64(reg, val) ivpu_hw_reg_wr64(vdev, vdev->regv, (reg), (val), #reg, __func__) macro