Searched refs:RADEON_M_SPLL_REF_DIV_MASK (Results 1 – 2 of 2) sorted by relevance
51 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_engine_clock()81 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_memory_clock()153 RADEON_M_SPLL_REF_DIV_MASK; in radeon_read_clocks_OF()217 RADEON_M_SPLL_REF_DIV_MASK; in radeon_get_clock_info()269 RADEON_M_SPLL_REF_DIV_MASK; in radeon_get_clock_info()361 RADEON_M_SPLL_REF_DIV_MASK; in calc_eng_mem_clock()
1649 # define RADEON_M_SPLL_REF_DIV_MASK 0xff macro