Searched refs:RADEON_CP_RB_CNTL (Results 1 – 4 of 4) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | rs600.c | 478 tmp = RREG32(RADEON_CP_RB_CNTL); in rs600_asic_reset()
479 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in rs600_asic_reset()
482 WREG32(RADEON_CP_RB_CNTL, tmp); in rs600_asic_reset()
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| D | r300.c | 429 tmp = RREG32(RADEON_CP_RB_CNTL); in r300_asic_reset()
430 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in r300_asic_reset()
433 WREG32(RADEON_CP_RB_CNTL, tmp); in r300_asic_reset()
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| D | r100.c | 1204 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_NO_UPDATE); in r100_cp_init()
1210 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA | RADEON_RB_NO_UPDATE); in r100_cp_init()
1227 WREG32(RADEON_CP_RB_CNTL, tmp); in r100_cp_init()
2600 tmp = RREG32(RADEON_CP_RB_CNTL); in r100_asic_reset()
2601 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in r100_asic_reset()
2604 WREG32(RADEON_CP_RB_CNTL, tmp); in r100_asic_reset()
4028 tmp = RREG32(RADEON_CP_RB_CNTL); in r100_restore_sanity()
4030 WREG32(RADEON_CP_RB_CNTL, 0); in r100_restore_sanity()
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| D | radeon_reg.h | 3297 #define RADEON_CP_RB_CNTL 0x0704 macro
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