Searched refs:R9A09G057_IOTOP_0_SHCLK (Results 1 – 3 of 3) sorted by relevance
19 LAST_DT_CORE_CLK = R9A09G057_IOTOP_0_SHCLK,77 DEF_FIXED("iotop_0_shclk", R9A09G057_IOTOP_0_SHCLK, CLK_PLLCM33_DIV16, 1, 1),
19 #define R9A09G057_IOTOP_0_SHCLK 8 macro
96 clocks = <&cpg CPG_CORE R9A09G057_IOTOP_0_SHCLK>;