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Searched refs:R9A07G044_SSI0_PCLK2 (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dr9a07g044-cpg.h96 #define R9A07G044_SSI0_PCLK2 60 macro
/linux-6.12.1/drivers/clk/renesas/
Dr9a07g044-cpg.c294 DEF_MOD("ssi0_pclk", R9A07G044_SSI0_PCLK2, R9A07G044_CLK_P0,
/linux-6.12.1/arch/arm64/boot/dts/renesas/
Dr9a07g044.dtsi255 clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,