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Searched refs:R9A07G043_WDT0_PCLK (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dr9a07g043-cpg.h51 #define R9A07G043_WDT0_PCLK 19 macro
/linux-6.12.1/drivers/clk/renesas/
Dr9a07g043-cpg.c184 DEF_MOD("wdt0_pclk", R9A07G043_WDT0_PCLK, R9A07G043_CLK_P0,
/linux-6.12.1/arch/arm64/boot/dts/renesas/
Dr9a07g043.dtsi841 clocks = <&cpg CPG_MOD R9A07G043_WDT0_PCLK>,