Searched refs:R9A07G043_SSI1_RST_M2_REG (Results 1 – 3 of 3) sorted by relevance
159 #define R9A07G043_SSI1_RST_M2_REG 37 macro
326 DEF_RST(R9A07G043_SSI1_RST_M2_REG, 0x870, 1),
179 resets = <&cpg R9A07G043_SSI1_RST_M2_REG>;