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Searched refs:R9A07G043_CLK_M0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/clk/renesas/
Dr9a07g043-cpg.c138 DEF_FIXED("M0", R9A07G043_CLK_M0, CLK_PLL3_DIV2_4, 1, 1),
215 DEF_MOD("cru_aclk", R9A07G043_CRU_ACLK, R9A07G043_CLK_M0,
217 DEF_COUPLED("lcdc_clk_a", R9A07G043_LCDC_CLK_A, R9A07G043_CLK_M0,
248 DEF_COUPLED("eth0_axi", R9A07G043_ETH0_CLK_AXI, R9A07G043_CLK_M0,
252 DEF_COUPLED("eth1_axi", R9A07G043_ETH1_CLK_AXI, R9A07G043_CLK_M0,
/linux-6.12.1/include/dt-bindings/clock/
Dr9a07g043-cpg.h18 #define R9A07G043_CLK_M0 7 macro