| /linux-6.12.1/tools/perf/arch/arm/tests/ |
| D | regs_load.S | 10 #define R6 0x30 macro
47 str r6, [r0, #R6]
|
| /linux-6.12.1/tools/perf/arch/powerpc/tests/ |
| D | regs_load.S | 11 #define R6 6 * 8 macro
50 std 6, R6(3)
|
| /linux-6.12.1/Documentation/bpf/ |
| D | linux-notes.rst | 65 * Register R6 is an implicit input that must contain a pointer to a
78 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + imm))
84 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + src + imm))
|
| D | verifier.rst | 35 Since R6-R9 are callee saved, their state is preserved across the call.
39 bpf_mov R6 = 1
41 bpf_mov R0 = R6
44 is a correct program. If there was R1 instead of R6, it would have
65 bpf_ld R0 = *(u32 *)(R6 + 8)
67 intends to load a word from address R6 + 8 and store it into R0
68 If R6=PTR_TO_CTX, via is_valid_access() callback the verifier will know
71 If R6=PTR_TO_STACK, then access should be aligned and be within
88 Pointer register spill/fill is tracked as well, since four (R6-R9)
|
| D | classic_vs_extended.rst | 75 a return value of the function. Since R6 - R9 are callee saved, their state
124 R6 - rbx
135 bpf_mov R6, R1 /* save ctx */
142 bpf_mov R1, R6 /* restore ctx for next call */
|
| /linux-6.12.1/lib/ |
| D | test_bpf.c | 45 #define R6 BPF_REG_6 macro
3784 BPF_ALU64_IMM(BPF_MOV, R6, 6),
3794 BPF_ALU64_IMM(BPF_ADD, R6, 20),
3804 BPF_ALU64_IMM(BPF_SUB, R6, 10),
3814 BPF_ALU64_REG(BPF_ADD, R0, R6),
3826 BPF_ALU64_REG(BPF_ADD, R1, R6),
3838 BPF_ALU64_REG(BPF_ADD, R2, R6),
3850 BPF_ALU64_REG(BPF_ADD, R3, R6),
3862 BPF_ALU64_REG(BPF_ADD, R4, R6),
3874 BPF_ALU64_REG(BPF_ADD, R5, R6),
[all …]
|
| /linux-6.12.1/arch/powerpc/kernel/ |
| D | fpu.S | 150 2: SAVE_32FPVSRS(0, R4, R6)
153 REST_1FPVSR(0, R4, R6)
|
| /linux-6.12.1/drivers/media/i2c/ |
| D | wm8739.c | 36 R5 = 5, R6, R7, R8, R9, R15 = 15, enumerator
223 wm8739_write(sd, R6, 0x000); in wm8739_probe()
|
| /linux-6.12.1/arch/powerpc/mm/nohash/ |
| D | tlb_low.S | 180 PPC_ICBT(0,R6,R7) /* touch next cache line */
182 PPC_ICBT(0,R6,R7) /* touch next cache line */
184 PPC_ICBT(0,R6,R7) /* touch next cache line */
|
| /linux-6.12.1/tools/perf/arch/arm/util/ |
| D | unwind-libdw.c | 26 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
|
| /linux-6.12.1/Documentation/bpf/standardization/ |
| D | abi.rst | 21 * R6 - R9: callee saved registers that function calls will preserve
|
| /linux-6.12.1/tools/perf/arch/loongarch/util/ |
| D | unwind-libdw.c | 28 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
|
| /linux-6.12.1/tools/perf/arch/s390/util/ |
| D | unwind-libdw.c | 32 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
|
| /linux-6.12.1/tools/perf/arch/powerpc/util/ |
| D | unwind-libdw.c | 35 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
|
| /linux-6.12.1/drivers/net/hamradio/ |
| D | z8530.h | 13 #define R6 6 macro
|
| /linux-6.12.1/drivers/tty/serial/ |
| D | zs.h | 66 #define R6 6 macro
|
| D | sunzilog.h | 37 #define R6 6 macro
|
| D | ip22zilog.h | 45 #define R6 6 macro
|
| D | pmac_zilog.h | 123 #define R6 6 macro
|
| D | sunzilog.c | 210 write_zsreg(channel, R6, regs[R6]); in __load_zsregs()
1348 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
1364 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
|
| D | ip22zilog.c | 191 write_zsreg(channel, R6, regs[R6]); in __load_zsregs()
|
| /linux-6.12.1/arch/powerpc/platforms/pseries/ |
| D | hvCall.S | 39 std r6,STK_PARAM(R6)(r1); \
51 ld r6,STACK_FRAME_MIN_SIZE+STK_PARAM(R6)(r1); \
|
| /linux-6.12.1/arch/powerpc/kvm/ |
| D | bookehv_interrupts.S | 181 PPC_STL r6, VCPU_GPR(R6)(r4)
292 PPC_STL r6, VCPU_GPR(R6)(r11)
319 PPC_STL r6, VCPU_GPR(R6)(r11)
666 PPC_LL r6, VCPU_GPR(R6)(r4)
|
| D | booke_interrupts.S | 52 stw r6, VCPU_GPR(R6)(r4)
476 lwz r6, VCPU_GPR(R6)(r4)
|
| /linux-6.12.1/arch/hexagon/lib/ |
| D | memcpy.S | 146 #define data0 R6 /* lower 8 bytes of ldata0 */
|