Searched refs:QSERDES_V5_COM_CORECLK_DIV_MODE0 (Results 1 – 4 of 4) sorted by relevance
/linux-6.12.1/drivers/phy/qualcomm/ |
D | phy-qcom-qmp-qserdes-com-v5.h | 100 #define QSERDES_V5_COM_CORECLK_DIV_MODE0 0x168 macro
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D | phy-qcom-sgmii-eth.c | 56 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x0A); in qcom_dwmac_sgmii_phy_init_1g() 144 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x05); in qcom_dwmac_sgmii_phy_init_2p5g()
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D | phy-qcom-qmp-pcie.c | 1658 QMP_PHY_INIT_CFG(QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x0a), 1903 QMP_PHY_INIT_CFG(QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x0a), 2319 QMP_PHY_INIT_CFG(QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x0a), 2510 QMP_PHY_INIT_CFG(QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x0a),
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D | phy-qcom-qmp-combo.c | 1231 QMP_PHY_INIT_CFG(QSERDES_V5_COM_CORECLK_DIV_MODE0, 0x0a),
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