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Searched refs:QM_GLBL_CFG0_OFFSET (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Dgaudi2_regs.h232 #define QM_GLBL_CFG0_OFFSET (mmPDMA0_QM_GLBL_CFG0 - mmPDMA0_QM_BASE) macro
/linux-6.12.1/drivers/accel/habanalabs/gaudi2/
Dgaudi2.c4100 WREG32(reg_base + QM_GLBL_CFG0_OFFSET, 0); in gaudi2_disable_qman_common()
5171 WREG32(reg_base + QM_GLBL_CFG0_OFFSET, PDMA1_QMAN_ENABLE); in gaudi2_init_qman_common()
5173 WREG32(reg_base + QM_GLBL_CFG0_OFFSET, PDMA0_QMAN_ENABLE); in gaudi2_init_qman_common()
5175 WREG32(reg_base + QM_GLBL_CFG0_OFFSET, QMAN_ENABLE); in gaudi2_init_qman_common()