Home
last modified time | relevance | path

Searched refs:PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/smuio/
Dsmuio_10_0_2_sh_mask.h137 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK … macro
Dsmuio_13_0_3_sh_mask.h81 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK … macro
Dsmuio_11_0_0_sh_mask.h1061 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK … macro
Dsmuio_14_0_2_sh_mask.h70 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK … macro
Dsmuio_13_0_6_sh_mask.h76 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK … macro
Dsmuio_13_0_2_sh_mask.h1110 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK … macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_7_1_2_sh_mask.h5535 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK 0x1ffffff macro
Dsmu_7_1_3_sh_mask.h5645 #define PWR_DISP_TIMER_CONTROL__DISP_TIMER_INT_COUNT_MASK 0x1ffffff macro