Searched refs:PRIV_REG_INT_ENABLE (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | cikd.h | 1335 # define PRIV_REG_INT_ENABLE (1 << 23) macro
1368 # define PRIV_REG_INT_ENABLE (1 << 23) macro
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| D | cik.c | 7039 cp_int_cntl |= PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; in cik_irq_set()
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 3163 PRIV_REG_INT_ENABLE, in gfx_v9_4_3_set_priv_reg_fault_state()
3173 PRIV_REG_INT_ENABLE, in gfx_v9_4_3_set_priv_reg_fault_state()
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| D | gfx_v12_0.c | 4833 PRIV_REG_INT_ENABLE, in gfx_v12_0_set_priv_reg_fault_state()
4847 PRIV_REG_INT_ENABLE, in gfx_v12_0_set_priv_reg_fault_state()
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| D | gfx_v11_0.c | 6305 PRIV_REG_INT_ENABLE, in gfx_v11_0_set_priv_reg_fault_state()
6319 PRIV_REG_INT_ENABLE, in gfx_v11_0_set_priv_reg_fault_state()
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| D | gfx_v9_0.c | 6046 PRIV_REG_INT_ENABLE, in gfx_v9_0_set_priv_reg_fault_state()
6056 PRIV_REG_INT_ENABLE, in gfx_v9_0_set_priv_reg_fault_state()
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| D | gfx_v10_0.c | 9152 PRIV_REG_INT_ENABLE, in gfx_v10_0_set_priv_reg_fault_state()
9166 PRIV_REG_INT_ENABLE, in gfx_v10_0_set_priv_reg_fault_state()
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| D | gfx_v8_0.c | 6488 WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_REG_INT_ENABLE, in gfx_v8_0_set_priv_reg_fault_state()
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