Searched refs:PP_SMC_POWER_PROFILE_COUNT (Results 1 – 11 of 11) sorted by relevance
175 PP_SMC_POWER_PROFILE_COUNT, enumerator178 extern const char * const amdgpu_pp_profile_name[PP_SMC_POWER_PROFILE_COUNT];
200 static struct cmn2asic_mapping vangogh_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {1038 for (i = 0; i < PP_SMC_POWER_PROFILE_COUNT; i++) { in vangogh_get_power_profile_mode()1062 if (profile_mode >= PP_SMC_POWER_PROFILE_COUNT) { in vangogh_set_power_profile_mode()
222 static const struct cmn2asic_mapping arcturus_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {
230 static struct cmn2asic_mapping navi10_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {
247 static struct cmn2asic_mapping sienna_cichlid_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {
569 if (index >= PP_SMC_POWER_PROFILE_COUNT || in smu_cmn_to_asic_specific_index()
1240 if (profile >= PP_SMC_POWER_PROFILE_COUNT) in smu_is_workload_profile_available()
235 static struct cmn2asic_mapping smu_v14_0_2_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {1679 for (i = 0; i < PP_SMC_POWER_PROFILE_COUNT; i++) { in smu_v14_0_2_get_power_profile_mode()1743 if (smu->power_profile_mode >= PP_SMC_POWER_PROFILE_COUNT) { in smu_v14_0_2_set_power_profile_mode()
265 static struct cmn2asic_mapping smu_v13_0_0_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {2427 for (i = 0; i < PP_SMC_POWER_PROFILE_COUNT; i++) { in smu_v13_0_0_get_power_profile_mode()2492 if (smu->power_profile_mode >= PP_SMC_POWER_PROFILE_COUNT) { in smu_v13_0_0_set_power_profile_mode()
234 static struct cmn2asic_mapping smu_v13_0_7_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {2373 activity_monitor_external = kcalloc(PP_SMC_POWER_PROFILE_COUNT, in smu_v13_0_7_get_power_profile_mode()
132 static struct cmn2asic_mapping renoir_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {